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 INTEGRATED CIRCUITS
DATA SHEET
74HC1GU04 Inverter
Product specification File under Integrated Circuits, IC06 1998 Nov 18
Philips Semiconductors
Product specification
Inverter
FEATURES * Wide operating voltage: 2.0 to 6.0 V * Symmetrical output impedance * Low power dissipation * Balanced propagation delays * Very small 5-pin package * Output capability: standard. DESCRIPTION The 74HC1GU04 is a high-speed Si-gate CMOS device. The 74HC1GU04 provides the inverting single stage function. The standard output currents are 12 compared to the 74HCU04. FUNCTION TABLE See note 1. INPUT inA L H Note 1. H = HIGH voltage level; L = LOW voltage level. OUTPUT outY H L Notes QUICK REFERENCE DATA GND = 0 V; Tamb = 25 C; tr = tf = 6.0 ns. SYMBOL tPHL/tPLH CI CPD PARAMETER propagation delay inA to outY input capacitance power dissipation capacitance notes 1 and 2 CONDITIONS CL = 15 pF; VCC = 5 V
74HC1GU04
TYP. 5 5 14
UNIT ns pF pF
1. CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi + (CL x VCC2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; (CL x VCC2 x fo) = sum of outputs. 2. For HC1G the condition is VI = GND to VCC. PINNING PIN 1 2 3 4 5 n.c. inA GND outY VCC SYMBOL DESCRIPTION not connected data input ground (0 V) data output DC supply voltage
1998 Nov 18
2
Philips Semiconductors
Product specification
Inverter
ORDERING INFORMATION PACKAGES OUTSIDE NORTH AMERICA 74HC1GU04GW TEMPERATURE RANGE -40 to +125 C PINS 5 PACKAGE SC-88A MATERIAL plastic
74HC1GU04
CODE SOT353
MARKING HD
handbook, halfpage
n.c. 1 inA 2 GND 3
MNA042
5 VCC
U04
4 outY
handbook, halfpage
2
inA
outY
4
MNA043
Fig.1 Pin configuration.
Fig.2 Logic symbol.
handbook, halfpage
2
1
MNA044
4
handbook, halfpage
inA
outY
MNA045
Fig.3 IEC logic symbol.
Fig.4 Logic diagram.
1998 Nov 18
3
Philips Semiconductors
Product specification
Inverter
RECOMMENDED OPERATING CONDITIONS
74HC1GU04
74HC1G SYMBOL VCC VI VO Tamb tr, tf PARAMETER DC supply voltage input voltage output voltage operating ambient temperature range see DC and AC characteristics per device CONDITIONS MIN. 2.0 0 0 -40 - - - - - +25 - - - TYP. 5.0 MAX. 6.0 VCC VCC +125 1000 500 400 V V V C ns ns ns UNIT
input rise and fall times except VCC = 2.0 V for Schmitt-trigger inputs VCC = 4.5 V VCC = 6.0 V
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0 V). SYMBOL VCC IIK IOK IO ICC Tstg PD PARAMETER DC supply voltage DC input diode current(1) VI < -0.5 or VI > VCC + 0.5 V VO < -0.5 or VO > VCC + 0.5 V -0.5 V < VO < VCC + 0.5 V DC output diode current(1) DC output source or sink current standard outputs(1) DC VCC or GND current for types with standard outputs(1) storage temperature range power dissipation per for temperature range: -40 to +125 C; package 5 pins plastic SC-88A above +55 C PD derates linearly with 2.5 mW/K CONDITIONS MIN. -0.5 - - - - -65 - MAX. +7.0 20 20 12.5 25 +150 200 UNIT V mA mA mA mA C mW
Note 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1998 Nov 18
4
Philips Semiconductors
Product specification
Inverter
DC CHARACTERISTICS FOR THE 74HC1GU04 Over recommended operating conditions. Voltage are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER OTHER VIH HIGH-level input voltage VCC (V) 2.0 4.5 6.0 VIL LOW-level input voltage 2.0 4.5 6.0 VOH HIGH-level output voltage; all outputs VI = VIH or VIL, -IO = 20 A VI = VIH or VIL, -IO = 2.0 mA VI = VIH or VIL, -IO = 2.6 mA VI = VIH or VIL, IO = 20 A VI = VIH or VIL, IO = 2.0 mA VI = VIH or VIL, IO = 2.6 mA VI = VCC or GND 2.0 4.5 6.0 VOH HIGH-level output voltage; standard outputs LOW-level output voltage; all outputs 4.5 6.0 2.0 4.5 6.0 VOL LOW-level output voltage; standard outputs input leakage current quiescent supply current 4.5 6.0 6.0 MIN. 1.7 3.6 4.8 - - - 1.8 4.0 5.5 4.13 5.63 - - - - - - - Tamb (C) -40 to +85 TYP.(1) 1.4 2.6 3.4 0.6 1.9 2.6 2.0 4.5 6.0 4.32 5.81 0 0 0 0.15 0.16 - - MAX. - - - 0.3 0.9 1.2 - - - - - 0.2 0.5 0.5 0.33 0.33 1.0 10
74HC1GU04
-40 to +125 MIN. 1.7 3.6 4.8 - - - 1.8 4.0 5.5 3.7 5.2 - - - - - - - MAX. - - - 0.3 0.9 1.2 - - - - - 0.2 0.5 0.5 0.4 0.4 1.0 20
UNIT
V V V V V V V V V V V V V V V V A A
VOL
II ICC Note
VI = VCC or GND, 6.0 IO = 0
1. All typical values are measured at Tamb = 25 C.
1998 Nov 18
5
Philips Semiconductors
Product specification
Inverter
AC CHARACTERISTICS GND = 0 V; tr = tf = 6.0 ns; CL = 50 pF. TEST CONDITIONS SYMBOL PARAMETER WAVEFORMS tPHL/tPLH propagation delay inA to outY see Figs 5 and 6 VCC (V) 2.0 4.5 6.0 Note 1. All typical values are measured at Tamb = 25 C. AC WAVEFORMS - - - Tamb (C) -40 to +85 MIN. TYP.(1) 10 7 6 MAX. 90 18 15 - - -
74HC1GU04
-40 to +125 MIN. MAX. 105 21 18
UNIT
ns ns ns
handbook, halfpage
handbook, halfpage
VCC VI D.U.T. RT CL 50 pF
MNA034
inA INPUT
VM(1)
PULSE GENERATOR
VO
tPHL
tPLH
outY OUTPUT
VM(1)
MNA046
(1) HC1G VM = 50%; VI = GND to VCC.
Definitions for test circuit: CL = Load capacitance including jig and probe capacitance. (See "AC characteristics" for values). RT = Termination resistance should be equal to the output impedance ZO of the pulse generator.
Fig.5
The input (inA) to output (outY) propagation delays.
Fig.6 Load circuitry for switching times.
1998 Nov 18
6
Philips Semiconductors
Product specification
Inverter
TYPICAL TRANSFER CHARACTERISTICS
74HC1GU04
handbook, halfpage
1
MNA047
2
handbook, halfpage
10
MNA048
5
ICC (mA)
VO (V)
ICC (mA)
VO (V)
0.5
1
5
2.5
0 0 1 VI (V) 2
0
0 0 2.5 VI (V) 5
0
Fig.7 VCC = 2.0 V; IO = 0.
Fig.8 VCC = 4.5 V; IO = 0.
handbook, halfpage
20
MNA049
6
ICC (mA)
VO (V)
handbook, halfpage
Rbias = 560 k VCC
10
3
0.47 F VI (f = 1 kHz)
input
output 100 F
A IO GND
MNA050
0 0 3 VI (V) 6
0
Fig.9 VCC = 6.0 V; IO = 0.
Fig.10 Test set-up for measuring forward transconductance gfs = IO/VI at VO is constant.
1998 Nov 18
7
Philips Semiconductors
Product specification
Inverter
APPLICATION INFORMATION Some applications for the HC1GU04 are: * Linear amplifier (see Fig.11) * In crystal oscillator design (see Fig.12).
74HC1GU04
Note to the application information. All values given are typical unless otherwise specified.
handbook, halfpage
R2 VCC
1 F
R1 U04 ZL GND
MNA052
handbook, halfpage
R1
R2 U04 C1 out C2
MNA053
ZL > 10 k; AOL = 20 (typical) A OL A u = - ----------------------------------------------- ; R1 1 + ------- ( 1 + A OL ) R2 1 V O max (p-p) V CC - 1.5 V centered at -- V CC 2 R1 3 k, R2 1 M. Typical unity gain bandwidth product is 5 MHz. C1 see Fig.13. AOL = open loop amplification. Au = voltage amplification.
C1 = 47 pF (typical). C2 = 22 pF (typical). R1 = 1 to 10 M (typical). R2 optimum value depends on the frequency and required stability against changes in VCC or average minimum ICC (ICC is typically 2 mA at VCC = 3 V and f = 1 MHz).
Fig.11 HC1GU04 used as a linear amplifier.
Fig.12 Crystal oscillator configuration.
External components for resonator (f < 1 MHz) FREQUENCY (kHz) 10 to 15.9 16 to 24.9 25 to 54.9 55 to 129.9 130 to 199.9 200 to 349.9 350 to 600 R1 (M) R2 (k) C1 (pF) 2.2 2.2 2.2 2.2 2.2 2.2 2.2 220 220 100 100 47 47 47 56 56 56 47 47 47 47 C2 (pF) 20 10 10 5 5 5 5
Where: All values given are typical and must be used as an initial set-up.
1998 Nov 18
8
Philips Semiconductors
Product specification
Inverter
Optimum value for R2 FREQUENCY (kHz) 3 R2 (k) 2.0 8.0 1.0 4.7 0.5 2.0 0.5 1.0 replace R2 by C3 with a typical value of 35 pF
20
74HC1GU04
OPTIMUM FOR minimum required ICC minimum influence due to change in VCC
handbook, halfpage
80
MNA054
input capacitance (pF) 60
(1)
6 10 14 >14
minimum required ICC minimum influence by VCC
(2)
40
(3)
0 0 2 4 6 VI (V) 8
(1) VCC = 2.0 V. (2) VCC = 4.5 V. (3) VCC = 6.0 V.
Fig.13 Typical input capacitance as a function of the input voltage.
1998 Nov 18
9
Philips Semiconductors
Product specification
Inverter
PACKAGE OUTLINE Plastic surface mounted package; 5 leads
74HC1GU04
SOT353
D
B
E
A
X
y
HE
vMA
5
4
Q
A
A1
1
e1 e
2
bp
3
wM B detail X Lp
c
0
1 scale
2 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.8 A1 max 0.1 bp 0.30 0.20 c 0.25 0.10 D 2.2 1.8 E (2) 1.35 1.15 e 1.3 e1 0.65 HE 2.2 2.0 Lp 0.45 0.15 Q 0.25 0.15 v 0.2 w 0.2 y 0.1
OUTLINE VERSION SOT353
REFERENCES IEC JEDEC EIAJ SC-88A
EUROPEAN PROJECTION
ISSUE DATE 97-02-28
1998 Nov 18
10
Philips Semiconductors
Product specification
Inverter
SOLDERING Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferable be kept below 230 C. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results:
74HC1GU04
* Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. * For packages with leads on two sides and a pitch (e): - larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. * For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
1998 Nov 18
11
Philips Semiconductors
Product specification
Inverter
Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE WAVE BGA, SQFP HLQFP, HSQFP, HSOP, SMS PLCC(3), SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO Notes not suitable not suitable(2) suitable not recommended(3)(4) not recommended(5) suitable suitable suitable suitable suitable
74HC1GU04
REFLOW(1)
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
1998 Nov 18
12
Philips Semiconductors
Product specification
Inverter
NOTES
74HC1GU04
1998 Nov 18
13
Philips Semiconductors
Product specification
Inverter
NOTES
74HC1GU04
1998 Nov 18
14
Philips Semiconductors
Product specification
Inverter
NOTES
74HC1GU04
1998 Nov 18
15
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For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1998
SCA60
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
245106/00/01/pp16
Date of release: 1998 Nov 18
Document order number:
9397 750 03667


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